74LS139 DATASHEET PDF

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No Preview Available! In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The DM74LS decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs.

Two active-low and one active-high enable inputs reduce the need for external gates or invert- ers when expanding. A line decoder can be imple- mented with no external inverters, and a line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The DM74LS comprises two separate two-line-to-four- line decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applica- tions.

All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify sys- tem design. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings.

Note 4: Not more than one output should be shorted at a time, and the duration should not exceed one second. Typ Note 3 3. PDF ] Liens de partage. August Revised March General Description.

These Schottky-clamped circuits are designed to be used. In high-performance memory systems these decoders can. This means that the effective system delay. The DM74LS decodes one-of-eight lines, based upon. Two active-low and one active-high. A line decoder can be imple-. An enable input can be used as. The DM74LS comprises two separate two-line-to-four-. The active-low enable. All inputs are clamped with high-performance. Schottky diodes to suppress line-ringing and simplify sys-.

Memory decoders. Data transmission systems. DM74LS 21 ns. DM74LS 32 mW. DM74LS 34 mW. Ordering Code:. Order Number Package Number. Package Description. Devices also available in Tape and Reel. Absolute Maximum Ratings Note 2. Supply Voltage. Input Voltage. Storage Temperature Range. The device should not be. The parametric values defined in the Electrical. Characteristics tables are not guaranteed at the absolute maximum ratings.

Free Air Operating Temperature. V I Input Clamp Voltage. Output Voltage. I CC Supply Current. Note 3. From Input. To Output. Propagation Delay Time. Select to Output. Enable to Output. Min Max Min Max. Physical Dimensions inches millimeters unless otherwise noted Continued. Package Number M16D.

PDF ]. Fairchild Semiconductor. ON Semiconductor. Hitachi Semiconductor. Monolithic low-power CMOS device combining a programmable timer.

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74LS139 DEMULTIPLEXER. Datasheet pdf. Equivalent

We use Cookies to give you best experience on our website. By using our website and services, you expressly agree to the placement of our performance, functionality and advertising cookies. Please see our Privacy Policy for more information. The Enable can be used as the Data input for a 1 -of-4 demultiplexer application.

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74LS139 Datasheet

The device has two independent decoders, each accepting two. Each half of the LS can be used as a function. The LS is. The Flatpak version. Connection Diagram as. A0, A1.

GUIDE DE L ARCHITECTURE BIOCLIMATIQUE PDF

In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The DM74LS decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or invert- ers when expanding.

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